MIPI IP Cores
Digital Blocks offers MIPI I3C – Inter Integrated Circuit Controller and MIPI DSI-2 – Display Serial interface Controller Verilog IP Cores.
I3C Controller
The Digital Blocks I3C Controller is compliant with the MIPI I3C v1.0 specification. Building on Digital Blocks I2C and SPI families, the I3C Controllers are offered as Master/Slave (Verilog Core DB-I3C-MS-APB), Master-only (Verilog Core DB-I3C-M-APB), and Slave-only IPs (Verilog Core DB-I3C-S-APB), supporting the following features:
- Master, Secondary Master, Slave functions
- Single Data Rate (SDR)
- High Data Rate (HDR) (Licensing & Config Option)
- Dynamic Address Assignment
- In-band Interrupts
- Hot-Join Capability
- Synchronous Time Support & Asynchronous Time Stamping
- CCC Register and Configurable Data FIFO
- AMBA APB, AHB, AXI-lite Host Interface
- Interrupt Controller
- DMA Controller – (Licensing & Config Option)
- I2C legacy support
MIPI DSI-2
The Digital Blocks MIPI DSI-2 Host Controller IP Core is compliant with the MIPI Display Serial Interface 2, 14-Jan-2016 specification. The Digital Blocks DSI-2 supports the following features:
- DSI Host Controller IP
- DPI or DBI Interface
- DSI Packetizer/Channelizer/Lane Manager
- 1 to 4 Data Lanes
- Display resolutions – QQVGA, QCIF, QVGA, CIF, VGA, WVGA, XGA, FHD, QXGA, QSXGA
- 1 to 4 data lanes
- AMBA APB, AHB, AXI-lite Host Interface