AHB Scatter Gather DMA Controller – AHB Interconnect
The AHB Scatter-Gather (SG) Direct Memory Access (DMA) Controller Verilog IP with Master AHB Interconnect (verilog IP core DB-DMAC-MC-AHB) offers 1-16 Channels with similar features to the AXI version, with full AHB5 feature support. Below is a high-level Microarchitecture view of the AHB DMA Controller.
The DB-DMAC-MC-AHB excels at high data throughput on both small and large data sets. Scatter Gather lists transfer data via the AMBA AHB Interconnect between Memory-to-Memory, Peripheral-to/from-Memory, and Peripheral-to-Peripheral. The newer AHB5 Interconnect standard is supported, as well as AHB-lite. Below is an example System View of the AHB DMA Controller.
Digital Blocks Family of DMA Controller Engines
In addition to AHB DMA Controller, Digital Blocks offers AXI4 Memory-Mapped Multi-Channel Scatter-Gather DMA Controllers:
In addition to the AXI4 Memory-Map DMA Controller IPs, Digital Blocks offers Multi-Channel Scatter-Gather DMA Controllers that transfers data between AXI4 Memory Map and AXI4-Stream Interfaces (both MM2S and S2MM):